Fault Tuples in Diagnosis of Deep-Submicron Circuits
نویسندگان
چکیده
Diagnosis of malfunctioning deep-submicron (DSM) ICs is becoming more dificult due to the increasing sophistication of the manufacturing process and the structural complexity of the IC itself: At the same time, key diagnostic tusks that include defect localization are still solved using primitive models of the IC’s defects. This paper explores the use of “jault tuples” in diagnosis. Fault tuples can accurately mimic the complex misbehavior of DSM ICs at the logic level, enabling practical diagnosis of large circuits. Initial assessment of the use of fault tuples in diagnosis is performed based on a case study involving one specific category of polysilicon spot defects. Obtained results indicate that fault tuples may enhance diagnosis significantly.
منابع مشابه
MOCA ARM: Analog Reliability Measurement based on Monte Carlo Analysis
Due to the expected increase of defects in circuits based on deep submicron technologies, reliability has become an important design criterion. Although different approaches have been developed to estimate reliability in digital circuits and some measuring concepts have been separately presented to reveal the quality of analog circuit reliability in the literature, there is a gap to estimate re...
متن کاملTest and Debug in Deep-Submicron Technologies
With the scaling of feature sizes into Deep-Submicron (DSM) values, the level of integration and performance achievable in VLSI chips increases. A lot of work has been directed to tackle design related issues arising out of scaling, like leakage mitigation etc. However efforts to enhance testability of such designs have not been sufficient. It is not viable to overlook testability issues arisin...
متن کاملUniversal Fault Simulationi using Fault Tuples
AESTRACT We introduce a new fault representation mechanism for digital circuits based on fault tuples. A fault tuple is a simple 3-element condition for a signal line, its value, and clock cyclle constraint. AND-OR expressions of fault tuples are used to represent arbitrary misbehaviors. A fault simulator based on fault tuples was used to conduct experiments on benchmark circuits. Simulation re...
متن کاملLeakage Reduction ONOFIC Approach for Deep Submicron VLSI Circuits Design
Minimizations of power dissipation, chip area with higher circuit performance are the necessary and key parameters in deep submicron regime. The leakage current increases sharply in deep submicron regime and directly affected the power dissipation of the logic circuits. In deep submicron region the power dissipation as well as high performance is the crucial concern since increasing importance ...
متن کاملAUTONOMOUS RECOVERY OF RECONFIGURABLE LOGIC DEVICES USING PRIORITY ESCALATION OF SLACK by NAVEED IMRAN
Field Programmable Gate Array (FPGA) devices offer a suitable platform for survivable hardware architectures in mission-critical systems. In this dissertation, active dynamic redundancy-based fault-handling techniques are proposed which exploit the dynamic partial reconfiguration capability of SRAM-based FPGAs. Self-adaptation is realized by employing reconfiguration in detection, diagnosis, an...
متن کامل